Shield structure for a low crosstalk single ended clock distribution circuit
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United States of America Patent
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Mar 2, 2021
Grant Date -
Oct 4, 2018
app pub date -
Mar 31, 2017
filing date -
Mar 31, 2017
priority date (Note) -
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status (Latency Note)
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Abstract
An integrated circuit is described. The integrated circuit includes a first layer, a first clock line for carrying a first clock signal, and a second clock line for carrying a second clock signal. The second clock line runs alongside the first clock line for a distance. The integrated circuit includes a shield structure for shielding the clock line from crosstalk and/or other interference. The shield structure includes a shield wall extending from the first layer. The shield wall runs between the first and second clock lines for at least a portion of the distance. The shield structure may also include a shield cage extending from the first layer and surrounding the first and second clock lines for at least a portion of the distance. The shield cage has a plurality of openings. The shield cage and/or shield wall may be connected to the ground of an AC power supply.
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