PACKAGE SUBSTRATE COMPRISING SIDE PADS ON EDGE, CHIP STACK, SEMICONDUCTOR PACKAGE, AND MEMORY MODULE COMPRISING SAME
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United States of America Patent
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app pub date -
Aug 1, 2016
filing date -
Jul 31, 2015
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Abstract
The semiconductor package according to the present invention comprises: an integrated substrate; a bottom chip stack, which is mounted on the integrated substrate, has multiple memory semiconductor dies stacked chip-on-chip, and takes charge of a part of the whole memory capacity; at least one top chip stack, which is mounted on the bottom package, has multiple memory semiconductor dies mounted therein, and takes charge of the rest of the whole memory capacity; an integration wire for electrically connecting the bottom chip stack and the top chip stack(s); and an integration protection member for sealing the integration wire.
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