Word line contact regions for three-dimensional non-volatile memory
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United States of America Patent
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Oct 30, 2018
Grant Date -
Jul 12, 2018
app pub date -
Jun 16, 2017
filing date -
Jan 10, 2017
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Abstract
Apparatuses, systems, and methods are disclosed for three-dimensional non-volatile memory. A stack of word line layers includes word lines for a three-dimensional non-volatile memory array. A stack of word line layers may include a plurality of tiers. Word line switch transistors transfer word line bias voltages to the word lines. Word line contact regions couple word line switch transistors to word lines. A word line contact region includes a stepped structure for a tier of word line layers. A level region separates a word line contact region for a first tier from a word line contact region for a second tier.
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