Frequency divider with selectable frequency and duty cycle
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United States of America Patent
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Jun 11, 2019
Grant Date -
May 10, 2018
app pub date -
Nov 9, 2016
filing date -
Nov 9, 2016
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Abstract
A frequency divider system and method includes a split-divisor frequency divider module. The split-divisor frequency divider module receives a clock signal and generates an output signal based on a first divisor and a second divisor. The clock signal and output signal each have rectangular waveforms characterized by a respective frequency and pulse width. The frequency of the output signal is a selectable integer fraction of the frequency of the clock signal, the frequency of the output signal being selected based on a sum of the first and second divisors. The pulse width of the output signal is a selectable integer number of clock cycles, the pulse width of the output signal being selected based on at least one of the first divisor and the second divisor.
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