Integrated circuits having on-chip inductors with low common mode coupling effect
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United States of America Patent
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Aug 27, 2019
Grant Date -
Apr 12, 2018
app pub date -
Nov 30, 2017
filing date -
Jul 17, 2015
priority date (Note) -
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Abstract
Techniques pertaining to designs of integrated circuits having on-chip inductors with low common mode coupling effect are described. According to one aspect of the present invention, an integrated circuit is designed to have a first circuit operating at a first frequency and including a first inductor, and a second circuit including a second inductor and provided to process an input signal. The second circuit includes a second inductor and is provided to process an input signal. The second inductor includes a first terminal, a second terminal, an intermediate terminal, and an intermediate node, wherein a first wire is formed between the first terminal and the intermediate node, a second wire is formed between the intermediate node and the second terminal, and an intermediate tap is coupled between the intermediate node and the intermediate terminal, the first wire and the second wire forming a coil with one or more turns, and the first terminal, the second terminal and the intermediate terminal of the second inductor being located on one side of the coil and adjacent to each other.
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