Dual-level power-on reset (POR) circuit
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United States of America Patent
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Jun 25, 2019
Grant Date -
Mar 15, 2018
app pub date -
Sep 14, 2017
filing date -
Sep 14, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
An integrated circuit (IC) including a first power-on reset (POR) circuit and a second POR circuit is disclosed. The first POR circuit is configured to enable the second POR circuit when a supply voltage initially exceeds a first threshold voltage as the supply voltage is being applied to the IC. The second POR circuit is configured to activate a first section of circuitry when the second POR circuit is enabled by the first POR circuit and the supply voltage initially exceeds a second threshold voltage as the supply voltage is being applied to the IC. Since a POR threshold voltage can affect current drain and/or operational functions of an IC, having the first POR circuit configured to enable the second POR circuit and having the second POR circuit configured to activate the first section of the main circuitry allows the IC to operate properly while reducing current drain.
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