SEMICONDUCTOR CHIP, SEMICONDUCTOR APPARATUS, SEMICONDUCTOR WAFER, AND SEMICONDUCTOR WAFER DICING METHOD
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United States of America Patent
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Sep 5, 2017
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Sep 13, 2016
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Provided are a semiconductor chip, a semiconductor apparatus, a semiconductor wafer, and a semiconductor wafer dicing method in which chipping is prevented while securing an effective region of the semiconductor chip to have a sufficient area. Each semiconductor chip region which becomes a semiconductor chip has a rectangular shape, and includes non-effective regions in which no circuit device is placed. The non-effective regions are provided only at two corner portions located at two ends of an arbitrary side of the rectangular shape. The semiconductor wafer has a plurality of semiconductor chip regions arranged so that all non-effective regions face the traveling direction of a dicing blade in a second dicing step.
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