Charge/discharge control circuit and battery device including the same
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United States of America Patent
Stats
-
Jun 16, 2020
Grant Date -
Mar 1, 2018
app pub date -
Aug 29, 2017
filing date -
Aug 30, 2016
priority date (Note) -
In Force
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Abstract
Provided are a charge/discharge control circuit capable of using an FET having a low withstand voltage. The charge/discharge control circuit is configured to control charging and discharging of a secondary cell, and includes: a positive power supply terminal and a negative power supply terminal for monitoring a voltage of the secondary cell; a charge control terminal configured to connect to a gate of a charge control FET, the charge control FET having one end connected to an external negative terminal to which a negative electrode of a load or a charger is connected; and a clamp circuit configured to clamp a signal at a high level for turning on the charge control FET to a voltage that is higher than a reference voltage by a predetermined voltage, the reference voltage being a voltage at the external negative terminal, the signal being output to the charge control terminal.

First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
ABLIC INC | NAGANO |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Ono, Takashi | Chiba, JP | 389 | 4413 |
Sakurai, Atsushi | Chiba, JP | 209 | 1709 |
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