THREAD BLOCK MANAGING METHOD, WARP MANAGING METHOD AND NON-TRANSITORY COMPUTER READABLE RECORDING MEDIUM CAN PERFORM THE METHODS
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
N/A
app pub date -
Apr 12, 2017
filing date -
Aug 15, 2016
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A thread block managing method, applied to an electronic apparatus comprising a memory and a cache, comprising: (a) transforming memory addresses for the memory to cache addresses of the cache; (b) mapping a memory access range for a thread block to the cache addresses to generate a block access range; (c) calculating block locality between the thread blocks according to the block access range; and (d) allocating the thread blocks to a plurality of multi-processors depending on the block locality.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully