Receiver and signal processing method
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United States of America Patent
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Jun 25, 2019
Grant Date -
Feb 1, 2018
app pub date -
Sep 20, 2017
filing date -
Mar 24, 2015
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Abstract
Embodiments of the present disclosure disclose a receiver, including a high-speed sampling module (110), an analog Fast Fourier Transform (AFFT) module (120), a selection switch module (130), a low-speed analog to digital converter (ADC) module (140), and a control module (150). The high-speed sampling module (110) is configured to sample a received signal and output a sampled signal; the AFFT module (120) is configured to perform time-to-frequency conversion on the sampled signal and output an analog frequency domain signal; the selection switch module (130) is configured to transmit the analog frequency domain signal to the low-speed ADC module (140); and the control module (150) is configured to perform configuration on a sampling rate of the high-speed sampling module (110), a quantity of points of Fast Fourier Transform that are used b the AFFT module (120) for performing time-to-frequency conversion, and a target input port of the selection switch module (130).
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