Method of fabricating a semiconductor device
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United States of America Patent
Stats
-
Jan 8, 2019
Grant Date -
Feb 1, 2018
app pub date -
Jul 26, 2017
filing date -
Jul 28, 2016
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A method of fabricating a semiconductor device is disclosed. A substrate is provided. A dummy gate stack is formed on the substrate. The dummy gate stack includes a gate dielectric layer and an amorphous silicon dummy gate on the gate dielectric layer. The amorphous silicon dummy gate is transformed into a nano-crystalline silicon dummy gate. A spacer is formed on a sidewall of the nano-crystalline silicon dummy gate. A source/drain region is formed in the substrate on either side of the dummy gate stack.
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International Classification(s)
- 2017 Application Filing Year
- H01L Class
- 30754 Applications Filed
- 25260 Patents Issued To-Date
- 82.14 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- H01L Class
- 0 % this patent is cited more than
- 6 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Jul 8, 2026 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Jul 8, 2030 |
