Metal gate and contact plug design and method forming same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 10121873
APP PUB NO 20180033866A1
SERIAL NO

15429894

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method includes forming a dummy gate stack over a semiconductor region, forming a gate spacer on a sidewall of the dummy gate stack, removing the dummy gate stack to form an opening, forming a replacement gate stack in the opening, recessing the replacement gate stack to form a recess, filling the recess with a conductive material, and performing a planarization to remove excess portions of the conductive material over the gate spacer. A remaining portion of the conductive material forms a gate contact plug. A top portion of the gate contact plug is at a same level as a top portion of the first gate spacer.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU 300-78

International Classification(s)

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  • 2017 Application Filing Year
  • H01L Class
  • 30754 Applications Filed
  • 25260 Patents Issued To-Date
  • 82.14 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances2017201820192020202120222023202420250255075100

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Xi-Zong Tainan, TW 23 94
Chiu, Yi-Wei Kaohsiung, TW 145 922
Liao, Chih-Teng Hsin-Chu, TW 87 366
Tsai, Chia-Ching Tainan, TW 39 228

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Patent Citation Ranking

  • 4 Citation Count
  • H01L Class
  • 23.71 % this patent is cited more than
  • 7 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges3689997611243481558461392216162801 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +05001000150020002500300035004000450050005500600065007000750080008500900095001000010500

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