Semiconductor die singulation and structures formed thereby
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jul 21, 2020
Grant Date -
Feb 1, 2018
app pub date -
Dec 9, 2016
filing date -
Jul 29, 2016
priority date (Note) -
In Force
status (Latency Note)
Importance
Loading Importance Indicators... 
Abstract
An embodiment method includes providing a wafer including a first integrated circuit die, a second integrated circuit die, and a scribe line region between the first integrated circuit die and the second integrated circuit die. The method further includes forming a kerf in the scribe line region and after forming the kerf, using a mechanical sawing process to fully separate the first integrated circuit die from the second integrated circuit die. The kerf extends through a plurality of dielectric layers into a semiconductor substrate.
First Claim
Other Claims data not available
Family
Loading Family data...
International Classification(s)
- 2016 Application Filing Year
- H01L Class
- 27971 Applications Filed
- 23507 Patents Issued To-Date
- 84.05 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 2 Citation Count
- H01L Class
- 41.95 % this patent is cited more than
- 5 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Jan 21, 2028 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Jan 21, 2032 |
