Structure and formation method of interconnection structure of semiconductor device
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United States of America Patent
Stats
-
Sep 11, 2018
Grant Date -
Feb 1, 2018
app pub date -
Jul 29, 2016
filing date -
Jul 29, 2016
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a spacer element over a sidewall of the gate stack. The spacer element is substantially free of oxygen. The semiconductor device structure also includes a dielectric layer over the semiconductor substrate, and the dielectric layer surrounds the gate stack and the spacer element. The semiconductor device structure further includes a conductive contact penetrating through the dielectric layer and electrically connected to a conductive feature over the semiconductor substrate. An angle between a sidewall of the conductive contact and a top surface of the spacer element is in a range from about 90 degrees to about 120 degrees, and the conductive contact covers a portion of the spacer element.
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International Classification(s)
- 2016 Application Filing Year
- H01L Class
- 27971 Applications Filed
- 23507 Patents Issued To-Date
- 84.05 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- H01L Class
- 0 % this patent is cited more than
- 7 Age
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| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Mar 11, 2026 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Mar 11, 2030 |
