Dynamic random access memory (DRAM)
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United States of America Patent
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Aug 14, 2018
Grant Date -
Feb 1, 2018
app pub date -
Feb 28, 2017
filing date -
Jul 29, 2016
priority date (Note) -
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Abstract
According to one embodiment, a semiconductor memory device includes a memory cell, the cell includes a first capacitor which includes first and second electrodes, and a first transistor which includes first and second terminals and a first control terminal, the first terminal being connected to the first electrode, a first conductive line connected to the second terminal, a second conductive line connected to the second electrode, a sense amplifier, a switch element connected between the first conductive line and the sense amplifier, and a controller turning off the switch element in a write operation, applies a first potential to the first conductive line, and sets a potential of the second conductive line according to a value of write data to be written to the cell.
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