Memory cell and array having device, P-type transistor and N-type transistor
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 20, 2019
Grant Date -
Feb 1, 2018
app pub date -
Jan 14, 2016
filing date -
Mar 9, 2015
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An object of the present technology is to improve the performance of a memory cell that stores the value reflecting the direction of an electric current. The memory cell includes an N-type transistor, a P-type transistor, and a storage element. The N-type transistor supplies a current either from a source to a drain thereof or from the drain to the source. The P-type transistor supplies a current from a source to a drain thereof. The storage element stores a logical value reflecting the direction of the current supplied from the drain of the N-type transistor and from the drain of the P-type transistor.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully