Display device, gate driver and method of driving gate driver
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United States of America Patent
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Jan 8, 2019
Grant Date -
Feb 1, 2018
app pub date -
Dec 21, 2016
filing date -
Jul 29, 2016
priority date (Note) -
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Abstract
Provided is a gate driver and a method of driving the same, which enables a voltage level of a Q node to be stably maintained in a blank section by: inputting a clock signal that directly provides a high level to the Q node through a reset signal input end of a reset signal for resetting the Q node of a gate driver integrated circuit; inputting a reset signal for each blank section between frames; or providing a higher gate high voltage and a lower gate low voltage. There may be provided a gate driver integrated circuit that has a robust structure with high reliability and avoids an error of a scan signal by maintaining the voltage level of the Q node to be stable in the blank section, and a method of driving the same.
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