TECHNIQUES TO ALLOCATE REGIONS OF A MULTI-LEVEL, MULTI-TECHNOLOGY SYSTEM MEMORY TO APPROPRIATE MEMORY ACCESS INITIATORS

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United States of America Patent

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15224134

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Abstract

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A method is described. The method includes recognizing different latencies and/or bandwidths between different levels of a system memory and different memory access requestors of a computing system. The system memory includes the different levels and different technologies. The method also includes allocating each of the memory access requestors with a respective region of the system memory having an appropriate latency and/or bandwidth.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
KUMAR, Mohan J Aloha, US 231 3360
LIU, Min Portland, US 296 2713
LUO, Zhenlin Beijing, CN 1 12
NACHIMUTHU, Murugasamy K Beaverton, US 120 1269
VERGIS, George Portland, US 142 975
ZWISLER, Ross E Lafayette, US 17 166

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