Pattern treatment methods

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United States of America Patent

PATENT NO 10133179
APP PUB NO 20180031975A1
SERIAL NO

15224503

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Abstract

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A pattern treatment method, comprising: (a) providing a semiconductor substrate comprising a patterned feature on a surface thereof; (b) applying a pattern treatment composition to the patterned feature, wherein the pattern treatment composition comprises: a block copolymer and an organic solvent, wherein the block copolymer comprises: (i) a first block comprising a first unit formed from 4-vinyl-pyridine, and (ii) a second block comprising a first unit formed from a vinyl aromatic monomer; and (c) removing residual pattern shrink composition from the substrate, leaving a coating of the block copolymer over the surface of the patterned feature, thereby providing a reduced pattern spacing as compared with a pattern spacing of the patterned feature prior to coating the pattern treatment composition. The methods find particular applicability in the manufacture of semiconductor devices for providing high resolution patterns.

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Patent Owner(s)

Patent OwnerAddress
ROHM AND HAAS ELECTRONIC MATERIALS LLC455 FOREST STREET MARLBOROUGH MA 01752

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hustad, Phillip D Natick, US 110 2469
Jain, Vipul North Grafton, US 92 705
Kaitz, Joshua A Brighton, US 5 14
Li, Mingqi Shrewsbury, US 105 434
Park, Jong Keun Shrewsbury, US 65 724
Sung, Jin Wuk Northborough, US 23 197
Wu, Chunyi Shrewsbury, US 33 303

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