Test board for semiconductor package, test system, and method of manufacturing semiconductor package
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
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Oct 2, 2018
Grant Date -
Feb 1, 2018
app pub date -
Mar 10, 2017
filing date -
Jul 27, 2016
priority date (Note) -
In Force
status (Latency Note)
Importance
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US Family Size
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Non-US Coverage
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Abstract
A test board includes: a board substrate; a device under test (DUT) socket connected to the board substrate and configured to accommodate a semiconductor package; a test controller; a wireless signal unit configured to wirelessly exchange signals with a server; and a wireless power unit configured to be wirelessly charged by an external source and configured to supply electric power to the test controller and the DUT socket, wherein the test controller is configured to independently perform a test on the semiconductor package accommodated in the DUT socket in response to a test pattern command being wirelessly received from the server via the wireless signal unit.
First Claim
Other Claims data not available
Family
| Country | kind | publication No. | Filing Date |
|---|---|---|---|
| KR | B1 | KR102581480 | Jul 27, 2016 |
| CN | B | CN107664740 | May 08, 2017 |
| TW | B | TWI750173 | May 18, 2017 |
International Classification(s)
- 2017 Application Filing Year
- H02J Class
- 5376 Applications Filed
- 3962 Patents Issued To-Date
- 73.70 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 3 Citation Count
- H02J Class
- 22.71 % this patent is cited more than
- 7 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Apr 2, 2026 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Apr 2, 2030 |
