Controller, semiconductor memory system and operating method thereof
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United States of America Patent
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Nov 19, 2019
Grant Date -
Jan 25, 2018
app pub date -
May 23, 2017
filing date -
Jul 21, 2016
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Abstract
An operating method of a controller includes generating a square message matrix of k×k; and generating an encoded message by encoding the square message matrix row by row through a Bose-Chadhuri-Hocquenghem (BCH) code, wherein the square message matrix includes an upper triangular matrix and a lower triangular matrix, which are symmetrical to each other with reference to zero-padding blocks included in a diagonal direction in the square message matrix, wherein the upper triangular matrix includes “β” numbers of message blocks, each of which has a size of “α+1”, and “(N−β)” numbers of message blocks, each of which has a size of “α”, and wherein “α”, “β” and N have relationships represented by equations 1 and 2:
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