Voltage level translation circuit and multiple interface in communication system
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United States of America Patent
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Feb 5, 2019
Grant Date -
Jan 25, 2018
app pub date -
Aug 31, 2016
filing date -
Jul 25, 2016
priority date (Note) -
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Abstract
A voltage level translation circuit includes a first energy storage unit, a second energy storage unit, a first voltage level translation unit, and a second voltage level translation unit. The first voltage level translation unit is configured to translate a first communication interface transmitting pin voltage signal to realize a first communication between a first communication interface transmitting pin and a second communication interface receiving pin. The second voltage level translation unit is configured to translate a second communication interface transmitting pin voltage signal to realize a second communication between a second communication interface transmitting pin and a first communication interface receiving pin. A multiple interface communication system is also provided.
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