Semiconductor device and method of manufacturing the same
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United States of America Patent
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Nov 6, 2018
Grant Date -
Jan 25, 2018
app pub date -
Jul 14, 2017
filing date -
Jul 20, 2016
priority date (Note) -
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Abstract
In an LDMOS having an element isolation region of an STI structure, there is prevented an occurrence of insulation breakdown which might be caused when electrons generated in a semiconductor substrate near an edge portion of a bottom face of the element isolation region are poured into a gate electrode. Immediately over an upper surface of an offset region adjacent to the element isolation region embedded in a main surface of the semiconductor substrate between a source region and a drain region, there is provided a trench penetrating a silicon film forming the gate electrode. As a consequence, the silicon film and a metal film for filling the trench form the gate electrode.
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