High acceptor level doping in silicon germanium
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United States of America Patent
Stats
-
Jul 23, 2019
Grant Date -
Jan 25, 2018
app pub date -
Aug 3, 2017
filing date -
Jul 20, 2016
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A semiconductor structure is provided in which gallium-doped sacrificial epitaxial or polycrystalline germanium layer is formed on a silicon germanium substrate having a high percentage of germanium followed by annealing to diffuse the gallium into the silicon germanium substrate. The germanium layer is selectively removed to expose the surface of a gallium-doped silicon germanium region within the silicon germanium substrate. The process has application to the formation of electrically conductive regions within integrated circuits such as source/drain regions and junctions without the introduction of carbon into such regions.
First Claim
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International Classification(s)
- 2017 Application Filing Year
- H01L Class
- 30754 Applications Filed
- 25260 Patents Issued To-Date
- 82.14 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 2 Citation Count
- H01L Class
- 32.24 % this patent is cited more than
- 6 Age
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