Punch through stopper in bulk finFET device
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United States of America Patent
Stats
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Jan 1, 2019
Grant Date -
Jan 25, 2018
app pub date -
Sep 26, 2017
filing date -
Apr 16, 2014
priority date (Note) -
In Force
status (Latency Note)
Importance
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US Family Size
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Non-US Coverage
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Abstract
A method of forming a semiconductor device that includes forming a fin structure from a bulk semiconductor substrate and forming an isolation region contacting a lower portion of a sidewall of the fin structure, wherein an upper portion of the sidewall of the fin structure is exposed. A sacrificial spacer is formed on the upper portion of the sidewall of the fin structure. The isolation regions are recessed to provide an exposed section of the sidewall of the fin structure. A doped semiconductor material is formed on the exposed section of the lower portion of the sidewall of the fin structure. Dopant is diffused from the doped semiconductor material to a base portion of the fin structure.
First Claim
Other Claims data not available
Family
| Country | kind | publication No. | Filing Date | Type | Sub-Type |
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International Classification(s)
- 2017 Application Filing Year
- H01L Class
- 30754 Applications Filed
- 25260 Patents Issued To-Date
- 82.14 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- H01L Class
- 0 % this patent is cited more than
- 6 Age
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