Top contact resistance measurement in vertical FETS
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United States of America Patent
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Jun 12, 2018
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N/A
app pub date -
Apr 27, 2017
filing date -
Jul 25, 2016
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Abstract
A test device includes a diode junction layer having a first dopant conductivity region and a second dopant conductivity region formed within the diode junction layer on opposite sides of a diode junction. A first portion of vertical transistors is formed over the first dopant conductivity region as a device under test, and a second portion of vertical transistors is formed over the second dopant conductivity region. A common source/drain region is formed over the first and second portions of vertical transistors. Current through the first portion of vertical transistors permits measurement of a resistance at a probe contact connected to the common source/drain region.
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