Method of forming trenches with different depths
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United States of America Patent
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May 7, 2019
Grant Date -
Jan 25, 2018
app pub date -
Oct 2, 2017
filing date -
Mar 25, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
A semiconductor device includes a gate structure disposed over a substrate, and a first dielectric layer disposed over the substrate, including and over the gate structure. A first metal feature is disposed in the first dielectric layer, including an upper portion having a first width and a lower portion having a second width that is different than the first width. A dielectric spacer is disposed along the lower portion of the first metal feature, wherein the upper portion of the first metal feature is disposed over the dielectric spacer. A second dielectric layer is disposed over the first dielectric layer, including over the first metal feature and a second metal feature extends through the second dielectric layer to physically contact with the first metal feature. A third metal feature extends through the second dielectric layer and the first dielectric layer to physically contact the gate structure.
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