Ring bus architecture for use in a memory module
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jul 9, 2019
Grant Date -
Jan 25, 2018
app pub date -
Sep 26, 2017
filing date -
Dec 29, 2014
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Ring bus architectures for use in a memory module are disclosed. A memory module may include a primary ring bus; a ring bus controller positioned on the primary ring bus; a secondary ring bus in communication with the primary ring bus via a first bus bridge; and a tertiary ring bus in communication with the secondary ring bus via a second bus bridge. The ring bus controller is configured to direct the first bus bridge to route data between the primary ring bus and the secondary ring bus and is configured to direct the second bus bridge to route data between the secondary ring bus and the tertiary ring bus.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully