Efficient data recovery for write path errors

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United States of America Patent

PATENT NO 10346268
APP PUB NO 20180024897A1
SERIAL NO

15624520

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Abstract

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Systems and methods are provided for flash memory devices to improve the write performance in case of write path errors and to hide the write path error correction latency. Some embodiments can provide instant parity correction to allow user data sharing the same strip with the data block having an error to be programmed into the flash memory before the failed data is corrected. Additionally, selected stalling can allow some independent data in different flash memory dies or planes to be programmed during the time of write path error correction.

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Patent Owner(s)

Patent OwnerAddress
SK HYNIX INCGYEONGGI DO SOUTH KOREA GYEONGGI-DO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cai, Yu San Jose, US 249 1519
Lee, Sangcheol San Jose, US 37 232
Zhang, Fan Fremont, US 973 7171

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