PARALLEL PROCESSING APPARATUS AND NODE-TO-NODE COMMUNICATION METHOD
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United States of America Patent
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Jun 5, 2017
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Jul 22, 2016
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A cross compiler generates a logical communication area number for first identifying information that is assigned to each of multiple processes contained in parallel processing. An area converter and an address acquisition unit keep correspondence information that makes it possible to, on the basis of the first identifying information and second identifying information representing the parallel processing, specify a memory area that is allocated according to each set of the second identifying information corresponding to the logical communication area number, receives a communication instruction containing the first identifying information, the second identifying information and the logical communication area number, and acquires a memory area corresponding to the acquired logical communication area number on the basis of the correspondence information. A communication controller performs communication by using the memory area that is acquired by the address acquisition unit.
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