Hybrid transform scheme for video coding
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United States of America Patent
Stats
-
Apr 10, 2018
Grant Date -
Jan 18, 2018
app pub date -
Sep 28, 2017
filing date -
Nov 24, 2015
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An apparatus for decoding a current block from an encoded bitstream includes a memory and a processor. The processor is configured to execute instructions stored in the memory to decode, from the encoded bitstream, a prediction mode of the current block and decode the current block using a transform type selected from a set that includes only a symmetrical discrete sine transform (SDST) and a two-dimensional discrete cosine transform (2D DCT). If the prediction mode is an inter prediction mode, the transform type used is the SDST. If the prediction mode is an intra prediction mode, the transform type used is the 2D DCT.
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International Classification(s)
- 2017 Application Filing Year
- H04N Class
- 19055 Applications Filed
- 14406 Patents Issued To-Date
- 75.61 % Issued To-Date
Cited Art Landscape
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- 0 Citation Count
- H04N Class
- 0 % this patent is cited more than
- 7 Age
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