VIDEO PROCESSING SYSTEM WITH MULTIPLE SYNTAX PARSING CIRCUITS AND/OR MULTIPLE POST DECODING CIRCUITS
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United States of America Patent
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Issued Date -
Jan 18, 2018
app pub date -
Jul 9, 2017
filing date -
Jul 12, 2016
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Abstract
A video processing system includes a storage device, a demultiplexing circuit, and a syntax parser. The storage device includes a first buffer and a second buffer. The demultiplexing circuit performs a demultiplexing operation upon an input bitstream to write a video bitstream into the first buffer and write start points of bitstream segments of the video bitstream stored in the first buffer into the second buffer. Each start point is indicative of a start address of a corresponding bitstream segment stored in the first buffer. The syntax parser includes syntax parsing circuits and a syntax parsing control circuit. The syntax parsing control circuit fetches a start point from the second buffer, assigns the fetched start point to a syntax parsing circuit, and triggers the selected syntax parsing circuit to start syntax parsing of a bitstream segment that is read from the first buffer according to the fetched start point.
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