Receiver circuit, related integrated circuit and apparatus
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 20, 2018
Grant Date -
Jan 18, 2018
app pub date -
Oct 25, 2016
filing date -
Jul 13, 2016
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A receiver circuit extracts data from a serial data signal. The serial data signal contains a data packet having a first format with a first number of bits or a second format with a second number of bits based on a selection signal. The second format comprises the bits of the first format followed by one or more additional bits. The receiver circuit has at least one shift register having a total number of bits equal or greater than the number of bits of the second format and a switching circuit that selectively connects the serial data signal to one of the shift register serial inputs as a function of the selection signal. When the first format is selected and the respective bits received, the bits are stored in given positions of the one or more shift registers. The switching circuit also, when the second format is selected and the respective bits received, stores the bits of the first format included at the beginning of the second format in the same given positions of the one or more shift registers.
First Claim
Family

- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
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STMICROELECTRONICS S R L | ITALY AGRA BRIANZA AGRATE BRIANZA VARESE |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Notarangelo, Giuseppe | Gravina di Catania, IT | 11 | 42 |
# of filed Patents : 11 Total Citations : 42 | |||
Pappalardo, Francesco | Paterno′, IT | 55 | 288 |
# of filed Patents : 55 Total Citations : 288 |
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