Anti-fuses memory cell and memory apparatus
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United States of America Patent
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Jul 16, 2019
Grant Date -
Jan 18, 2018
app pub date -
Nov 27, 2015
filing date -
Jan 20, 2015
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Abstract
A memory cell of the present disclosure includes: anti-fuses that are respectively inserted into a plurality of paths, one ends of the respective plurality of paths being coupled to one another; a resistor that is inserted into one or more of the plurality of paths; and a selection transistor that is turned on to couple a first coupling terminal to the one ends of the respective paths.
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