Semiconductor device and method of manufacturing the same

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United States of America Patent

PATENT NO 10176994
APP PUB NO 20180019131A1
SERIAL NO

15545732

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Abstract

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A p-type base layer (2) is formed on a surface of an n-type silicon substrate (1). First and second n+-type buffer layers (8,9) 9 are formed on a back surface of the n-type silicon substrate (1). The first n+-type buffer layer (8) is formed by a plurality of implantations of protons at different accelerating voltages and has a plurality of peak concentrations with different depths from the back surface of the n-type silicon substrate (1). The second n+-type buffer layer (9) is formed by an implantation of a phosphorus. A position of a peak concentration of the phosphorus is shallower from the back surface of the n-type silicon substrate (1) than positions of peak concentrations of the protons. The peak concentration of the phosphorus is higher than the peak concentrations of the protons. A concentration of the protons is higher than a concentration of the phosphorus at the positions of the peak concentrations of the protons.

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Patent Owner(s)

Patent OwnerAddress
MITSUBISHI ELECTRIC CORPORATION7-3 MARUNOUCHI 2-CHOME CHIYODA-KU TOKYO 100-8310

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukada, Yusuke Tokyo, JP 10 52
Kamibaba, Ryu Tokyo, JP 18 42
Nakamura, Katsumi Tokyo, JP 134 2849
Narazaki, Atsushi Tokyo, JP 37 303
Suzuki, Kenji Tokyo, JP 1029 11556

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