Method for processing a wafer, and layer stack
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United States of America Patent
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Oct 6, 2020
Grant Date -
Jan 18, 2018
app pub date -
Jul 13, 2017
filing date -
Jul 14, 2016
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Abstract
In various embodiments, a method for processing a wafer is provided. The method includes forming a layer stack, including a support layer and a useful layer and a sacrificial region between them, said sacrificial region having, vis-à-vis a processing fluid, a lower mechanical and/or chemical resistance than the support layer and than the useful layer. The support layer has a depression, which exposes the sacrificial region. The method further includes forming at least one channel in the exposed sacrificial region by means of the processing fluid. The channel connects the depression to an exterior of the layer stack.
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