METHOD AND MATERIAL FOR CMOS CONTACT AND BARRIER LAYER
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United States of America Patent
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Jun 23, 2017
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Jul 18, 2016
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The present disclosure generally relate to methods for forming an epitaxial layer on a semiconductor device, including a method of forming a tensile-stressed silicon antimony layer. The method includes heating a substrate disposed within a processing chamber, wherein the substrate comprises silicon, and exposing a surface of the substrate to a gas mixture comprising a silicon-containing precursor and an antimony-containing precursor to form a silicon antimony alloy having an antimony concentration of 5×1020 to 5×1021 atoms per cubic centimeter or greater on the surface.
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