Method and apparatus for performing rewind structural verification of retimed circuits driven by a plurality of clocks

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United States of America Patent

PATENT NO 10157247
APP PUB NO 20180018417A1
SERIAL NO

15718424

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Abstract

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A method for designing a system on a target device includes performing register retiming on an original design for the system to generate a retimed design. The retimed design is verified to determine whether it is structurally correct by performing a plurality of iterations of register retiming on the retimed design, wherein each iteration accounts for the retiming of registers in the system driven by a different clock.

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Patent Owner(s)

Patent OwnerAddress
ALTERA CORPORATION101 INNOVATION DRIVE SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Iyer, Mahesh A Fremont, US 85 460
Kamath, Vasudeva M Sunnyvale, US 7 21

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