Providing memory bandwidth compression using compression indicator (CI) hint directories in a central processing unit (CPU)-based system
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United States of America Patent
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Dec 11, 2018
Grant Date -
Jan 18, 2018
app pub date -
Sep 28, 2017
filing date -
Mar 31, 2016
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Abstract
Providing memory bandwidth compression using compression indicator (CI) hint directories in a central processing unit (CPU)-based system is disclosed. In this regard, a compressed memory controller provides multiple CI hint directory entries, each providing a plurality of CI hints. The compressed memory controller receives a memory write request comprising write data, determines a compression pattern for the write data, and generates a CI for the write data based on the compression pattern. The compressed memory controller writes the write data to the memory line, and writes the generated CI into one or more ECC bits of the memory line. In parallel, the compressed memory controller determines whether the physical address corresponds to a CI hint directory entry, and, if so, a CI hint of the CI hint directory entry corresponding to the physical address is updated based on the generated CI.
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