Power saving with dual-rail supply voltage scheme
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United States of America Patent
Stats
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May 15, 2018
Issued Date -
N/A
app pub date -
Jul 5, 2016
filing date -
Jul 5, 2016
priority date (Note) -
In Force
status (Latency Note)
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Abstract
In an embodiment, an integrated circuit includes a clock tree circuit and logic circuitry that is clocked by the clocks received from the clock tree circuit. The logic circuit is powered by a first power supply voltage. The integrated circuit includes a voltage regulator that receives the first power supply voltage and generates a second power supply voltage having a magnitude that is lower than the magnitude of the first power supply voltage by a predetermined amount. The second power supply voltage may track the first power supply voltage over dynamic changes during use, either intentional changes to operating state or noise-induced changes. The second power supply voltage may be used to power at least a portion of the clock tree.
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
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APPLE INC | ONE APPLE PARK WAY CUPERTINO CA 95014 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
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Klass, Edgardo F | Palo Alto, US | 54 | 515 |
# of filed Patents : 54 Total Citations : 515 |
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- 3 Citation Count
- H03K Class
- 21.67 % this patent is cited more than
- 7 Age
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