High voltage semiconductor devices including main conductive pattern, auxiliary conductive pattern, and spacer therebetween
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United States of America Patent
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Jul 17, 2018
Grant Date -
Jan 11, 2018
app pub date -
Jun 19, 2017
filing date -
Jul 8, 2016
priority date (Note) -
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Abstract
The semiconductor device including a device isolation layer disposed in a substrate and defining an active region, a first conductive pattern on the active region, an impurity region in the active region on a side of the first conductive pattern, a second conductive pattern on the active region between the impurity region and the first conductive pattern, a first spacer between the first conductive pattern and the second conductive pattern, and a contact plug disposed on and electrically connected to the first conductive pattern may be provided. The second conductive pattern may have a width less than a width of the contact plug.
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