Integrated circuit and method for manufacturing thereof
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United States of America Patent
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Mar 27, 2018
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N/A
app pub date -
Aug 10, 2016
filing date -
Jul 6, 2016
priority date (Note) -
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Abstract
A method for manufacturing an integrated circuit includes following steps. A substrate including a memory region and a core region is provided. At least two semiconductor word lines, two memory cells in between the two semiconductor word lines, and a semiconductor gate in between the two memory cells are formed in the memory region. A transistor device including a dummy gate is formed in the core region, and a height of the dummy gate is larger than a height of the semiconductor word lines. A protecting layer is formed on the semiconductor word lines, the memory cells, the semiconductor gate and the transistor device. A portion of the protecting layer is removed to expose the dummy gate and followed be removing the dummy gate to form a gate trench in the transistor device. Then a metal gate is formed in the gate trench.
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