Semiconductor memory package including stacked layers and memory device and semiconductor memory system having the same
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United States of America Patent
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Oct 9, 2018
Grant Date -
Jan 11, 2018
app pub date -
Jun 14, 2017
filing date -
Jul 8, 2016
priority date (Note) -
In Force
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Abstract
A semiconductor memory package includes a base layer that communicates with a memory controller; at least one memory layer that is stacked on the base layer; and at least one through silicon via that penetrates through the at least one memory layer, wherein at least one signal bump for exchanging a signal with the memory controller is disposed in a first area of the base layer located to be adjacent to the memory controller, and wherein the first area corresponds to an edge area of the base layer, and a power bump for receiving power from outside of the semiconductor memory package for performing a signal processing operation on the signal is disposed in a second area of the base layer contacting the at least one through silicon via, wherein the second area corresponds to an area other than edge areas of the base layer.

First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
SAMSUNG ELECTRONICS CO LTD | GYEONGGI DO SOUTH KOREA GYEONGGI-DO |
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- [Patents Count]
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Kim, Seok | Hwaseong-si, KR | 97 | 941 |
Oh, Chi-sung | Suwon-si, KR | 26 | 627 |
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