Trap layer substrate stacking technique to improve performance for RF devices
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United States of America Patent
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Sep 14, 2021
Grant Date -
Jan 11, 2018
app pub date -
Sep 6, 2017
filing date -
Oct 19, 2015
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Abstract
Some embodiments of the present disclosure are directed to a device. The device includes a substrate comprising a silicon layer disposed over an insulating layer. The substrate includes a transistor device region and a radio-frequency (RF) region. An interconnect structure is disposed over the substrate and includes a plurality of metal layers disposed within a dielectric structure. A handle substrate is disposed over an upper surface of the interconnect structure. A trapping layer separates the interconnect structure and the handle substrate.
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