Hybrid interconnects and method of forming the same
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United States of America Patent
Stats
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Oct 15, 2019
Grant Date -
Jan 11, 2018
app pub date -
May 31, 2017
filing date -
Jul 6, 2016
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A method for manufacturing a semiconductor device includes forming a trench in at least one dielectric layer; and forming an interconnect structure in the trench, wherein forming the interconnect structure includes forming a first conductive layer on a bottom surface of the trench, and partially filling the trench, and forming a second conductive layer on the first conductive layer, and filling a remaining portion of the trench, wherein the second conductive layer comprises a different material from the first conductive layer, and wherein an amount of the first conductive layer in the trench is controlled so that an aspect ratio of the second conductive layer has a value that is determined to result in columnar grain boundaries in the second conductive layer.
First Claim
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Family
| Country | kind | publication No. | Filing Date |
|---|---|---|---|
| US | B1 | US9748173 | Jul 06, 2016 |
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- H01L Class
- 0 % this patent is cited more than
- 6 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Apr 15, 2027 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Apr 15, 2031 |
