Design-aware pattern density control in directed self-assembly graphoepitaxy process
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United States of America Patent
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May 29, 2018
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Jul 11, 2016
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Jul 11, 2016
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Abstract
A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.
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