RRAM cell with PMOS access transistor
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United States of America Patent
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Dec 25, 2018
Grant Date -
Jan 11, 2018
app pub date -
Sep 12, 2017
filing date -
Nov 13, 2015
priority date (Note) -
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Abstract
In some embodiments, the present disclosure relates to a method of operating an RRAM cell having a PMOS access transistor. The method may be performed by turning on a PMOS transistor having a drain terminal coupled to a lower electrode of an RRAM device. A first voltage is provided to a source terminal of the PMOS transistor, and a second voltage is provided to a bulk terminal of the PMOS transistor. The second voltage is larger than the first voltage. A third voltage is provided to an upper electrode of the RRAM device. The third voltage is larger than the first voltage.
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