FET based synapse network
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United States of America Patent
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Jan 12, 2021
Grant Date -
Jan 11, 2018
app pub date -
Jul 6, 2016
filing date -
Jul 6, 2016
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Abstract
A synapse network device includes an array of field effect transistor (FET) devices having controllable channel resistance. Pre-neurons are coupled to the array to provide input pulses to the array on first terminals of the FET devices. Post-neurons are coupled to the array to receive outputs from the array on second terminals of the FET devices and provide feedback to the array on third terminals of the FET devices, wherein a state of the FET devices is indicated based upon signals applied to the FET devices.
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