Nonvolatile memory system and error determination method thereof
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United States of America Patent
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May 21, 2019
Grant Date -
Jan 11, 2018
app pub date -
Feb 16, 2017
filing date -
Jul 5, 2016
priority date (Note) -
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Abstract
A memory system may be provided. The memory system may include a memory apparatus including a plurality of memory cells. The memory system may include and a controller configured to control a write operation and a read operation with respect to the memory apparatus, detect an error occurrence position by performing the write operation and the read operation on a corresponding region of the memory apparatus in which an error occurs based on error occurrence address information generated in the read operation while changing a level of data to be written, and determine a type of error based on the detected error occurrence position.
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