Hardware controlled instruction pre-fetching
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United States of America Patent
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Nov 6, 2018
Grant Date -
Jan 11, 2018
app pub date -
Jul 5, 2016
filing date -
Jul 5, 2016
priority date (Note) -
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Abstract
A task control circuit maintains, in response to task event information, a task information queue that includes task information for a plurality of tasks. Based upon the task information in the task information queue, a future task switch condition is identified as corresponding to a task switch time for a particular task of the plurality of tasks. A load start time is determined for a set of instructions for the particular task. A pre-fetch request is generated to load the set of instructions for the particular task into the memory circuit. The pre-fetch request is forwarded to a hardware loader circuit. In response to the task switch time, a task event trigger is generated for the particular task. The hardware loader circuit is used to load, in response to the pre-fetch request, the set of instructions from a non-volatile memory into the memory circuit.
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